Recent developments in modern semiconductor memory cells include so-called solid electrolyte memory cells, for example, nonvolatile semiconductor memory cells with a storage mechanism based on a solid electrolyte. In these and corresponding fabrication methods, the solid electrolyte region of a memory element can be formed between a first or bottom electrode device and a second or top electrode device. A field effect transistor (FET) can be formed as a selection transistor for addressing the memory element. The FET has a source region, a drain region, and a channel region. In between the source and the drain, a gate electrode device is form adjacent the channel region of the FET, and is essentially electrically insulated from the channel region by a gate insulation region. In order to realize the memory effect or storage mechanism, the solid electrolyte region is formed with different conductivity states or electrical conductivities via its controlled activation by controlled introduction of at least one activating species. It is possible for the states or conductivities to be assigned to different memory states or information states. Specifically, the assignments are based on the respective influence of the conductivity states or electrical conductivities on the conductivity of the channel region of the field effect transistor as selection transistor.
It has not previously been possible to integrate a nonvolatile semiconductor memory cell having a storage mechanism based on a solid electrolyte and its fabrication method into a customary semiconductor technology or into a corresponding fabrication method for customary semiconductor technologies without problems.